University of Illinois Urbana-Champaign

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Showing 1–30 of 71 items
Thumbnail for Testing Memory Management Units
Testing Memory Management Units
Hamilton, Jeffrey; Kunda, Ramachandra P.; Rathi, Bharat Deep

Thumbnail for A Cache Diagnostics Method
A Cache Diagnostics Method
Kunda, Ramachandra P.; Hamilton, Jeffrey; Lee, Dongjae; Rathi, Bharat Deep

Thumbnail for Probabilistic Analysis and Algorithms for Reconfiguration of Memory Arrays
Probabilistic Analysis and Algorithms for Reconfiguration of Memory Arrays
Shi, Weiping; Fuchs, W. Kent

Thumbnail for A Genetic-Algorithm Approach to Architectural-Level Justification of Precomputed Vectors
A Genetic-Algorithm Approach to Architectural-Level Justification of Precomputed Vectors
Hsiao, Michael S.; Patel, Janak H.

Thumbnail for Automatic Generation of Instruction Sequences for Testing Microprocessors
Automatic Generation of Instruction Sequences for Testing Microprocessors
Lee, Jaushin; Patel, Janak H.

Thumbnail for State Justification Using Genetic Algorithms in Sequential Circuit Test Generation
State Justification Using Genetic Algorithms in Sequential Circuit Test Generation
Rudnick, Elizabeth Marie; Patel, Janak H.

Thumbnail for Reliability Driven Synthesis of Sequential Circuits
Reliability Driven Synthesis of Sequential Circuits
Hsu, Frank F.; Hsiao, Michael S.; Banerjee, Prithviraj

Thumbnail for New Techniques for Probabilistic Simulation of VLSI CMOS Circuits
New Techniques for Probabilistic Simulation of VLSI CMOS Circuits
Stamoulis, Georgios I.

Thumbnail for Probabilistic Simulation for Reliability and Average Power Estimation
Probabilistic Simulation for Reliability and Average Power Estimation
Stamoulis, Georgios Ioannis

Thumbnail for ProperCAD: A Portable Object-Oriented Parallel Environment for VLSI CAD
ProperCAD: A Portable Object-Oriented Parallel Environment for VLSI CAD
Ramkumar, Balkrishna; Banerjee, Prithviraj

Thumbnail for Design and Implementation of an Actor Based Parallel VHDL Simulator
Design and Implementation of an Actor Based Parallel VHDL Simulator
Krishnaswamy, V.; Banerjee, P.

Thumbnail for A Simulation and Redesign System for Circuit Hot-Carrier Reliability
A Simulation and Redesign System for Circuit Hot-Carrier Reliability
Li, Ping-Chung

Thumbnail for A Switch-Level Concurrent Fault Simulator for MOS Circuits
A Switch-Level Concurrent Fault Simulator for MOS Circuits
Lee, Terry Ping-Chung

Thumbnail for A Graph Traversal Based Framework for Sequential Logic Implication with an Application to C-Cycle Redundancy Identification
A Graph Traversal Based Framework for Sequential Logic Implication with an Application to C-Cycle Redundancy Identification
Zhao, Jian-Kun; Newquist, Jeffrey A.; Patel, Janak H.

Thumbnail for The Use of Hierarchy in Test Generation, Fault Simulation, and Testability Analysis Algorithms
The Use of Hierarchy in Test Generation, Fault Simulation, and Testability Analysis Algorithms
Rogers, William Arthur

Thumbnail for Fast Logic Implication Discovery
Fast Logic Implication Discovery
Newquist, Jeffrey Aaron

Thumbnail for Parallel Algorithms for Force Directed Scheduling of Flattened and Hierarchical Signal Flow Graphs
Parallel Algorithms for Force Directed Scheduling of Flattened and Hierarchical Signal Flow Graphs
Prabhakaran, Pradeep; Banerjee, Prithviraj

Thumbnail for New Algorithms for Sequential Diagnosis
New Algorithms for Sequential Diagnosis
Khanna, Sanjeev

Thumbnail for Measurement-Based Performance Models of Numerical Problems on Loosely Coupled Systems
Measurement-Based Performance Models of Numerical Problems on Loosely Coupled Systems
Rahmeh, Joseph Toufic

Thumbnail for Crosstalk Noise in Deep Submicron Integrated Circuit Design
Crosstalk Noise in Deep Submicron Integrated Circuit Design
Becer, Murat R.

Thumbnail for Design, Diagnosis and Reconfiguration of Defect-Tolerant VLSI
Design, Diagnosis and Reconfiguration of Defect-Tolerant VLSI
Chang, Ming-Feng

Thumbnail for A Parallel Algorithm for Multi-Level Logic Synthesis Using the Transduction Method
A Parallel Algorithm for Multi-Level Logic Synthesis Using the Transduction Method
Lim, Chieng-Fai

Thumbnail for Worst Case Voltage Drops in Power and Ground Buses of CMOS VLSI Circuits
Worst Case Voltage Drops in Power and Ground Buses of CMOS VLSI Circuits
Kriplani, Harish

Thumbnail for iSITE: Automatic Circuit Synthesis for Double-Metal CMOS VLSI Circuits
iSITE: Automatic Circuit Synthesis for Double-Metal CMOS VLSI Circuits
Gee, Perry

Thumbnail for Performance Analysis of Numerical Problems on a Loosely Coupled System
Performance Analysis of Numerical Problems on a Loosely Coupled System
Rahmeh, Joseph T.; Abraham, Jacob A.

Thumbnail for Fault-Tolerant Computing: An Overview
Fault-Tolerant Computing: An Overview
Iyer, R.K.; Patel, J.H.; Fuchs, W.K.; Banerjee, P.; Horst, R.

Thumbnail for An Algebraic Approach to Switch-Level Simulation
An Algebraic Approach to Switch-Level Simulation
Hajj, Ibrahim N.

Thumbnail for The Design and Implementation of a Workbench for Application Specific Message-Passing Parallel Reconfigurable Architectures
The Design and Implementation of a Workbench for Application Specific Message-Passing Parallel Reconfigurable Architectures
Hwang, Kou-Rey David

Thumbnail for A microcomputer-based voice recognition system
A microcomputer-based voice recognition system
Liu, Thomas Chiatung

Thumbnail for Circuit Simulation of Large Emitter-Coupled Logic Circuits
Circuit Simulation of Large Emitter-Coupled Logic Circuits
Brauer, Elizabeth Jewel