University of Illinois Urbana-Champaign

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Showing 1–30 of 58 items
Thumbnail for On the Complexity of the General Channel Routing Problem in the Knock-Knee Mode
On the Complexity of the General Channel Routing Problem in the Knock-Knee Mode
Sarrafzadeh, M.

Thumbnail for A New Methodology for VLSI Layout
A New Methodology for VLSI Layout
Sarrafzadeh, M.; Preparata, F.P.

Thumbnail for Recursive Gate-Arrays
Recursive Gate-Arrays
Chiang, C.; Maddila, S.; Sarrafzadeh, M.

Thumbnail for Compact Channel-Routing of Multiterminal Nets
Compact Channel-Routing of Multiterminal Nets
Sarrafzadeh, M.; Preparata, F.P.

Thumbnail for An Optimum Channel Routing Algorithm in the Restricted Wire Overlap Model
An Optimum Channel Routing Algorithm in the Restricted Wire Overlap Model
Zhou, Dian

Thumbnail for Algorithms for VLSI routing
Algorithms for VLSI routing
Zhou, Dian

Thumbnail for Algorithms for VLSI Routing
Algorithms for VLSI Routing
Zhou, Dian

Thumbnail for Hierarchical Approaches to Vlsi Circuit Layout
Hierarchical Approaches to Vlsi Circuit Layout
Sarrafzadeh, Majid

Thumbnail for The mesh of trees architecture for parallel computation
The mesh of trees architecture for parallel computation
Hornick, Scot W.

Thumbnail for On Problem Transformability in VLSI
On Problem Transformability in VLSI
Hornick, Scot; Sarrafzadeh, Majid

Thumbnail for Discrete Warehouse Problem
Discrete Warehouse Problem
Maddila, Sanjeev R.; Sarrafzadeh, Majid

Thumbnail for New Algorithms and Bounds for Multilayer Channel Routing
New Algorithms and Bounds for Multilayer Channel Routing
Brady, Martin Lee

Thumbnail for Geometric planning for VLSI routing and robot motion
Geometric planning for VLSI routing and robot motion
Maddila, Sanjeev Rao

Thumbnail for The Mesh of Trees Architecture for Parallel Computation
The Mesh of Trees Architecture for Parallel Computation
Hornick, Scot Wayne

Thumbnail for Knowledge Management through the Lens of Library and Information Science: A Study of Job Advertisements
Knowledge Management through the Lens of Library and Information Science: A Study of Job Advertisements
Harper, Ray

Thumbnail for Lower and Upper-Bounds for the General Junction Routing Problem
Lower and Upper-Bounds for the General Junction Routing Problem
Maddila, Sanjeev Rao; Zhou, Dian

Thumbnail for Efficient Algorithms for the Channel Routing Problem
Efficient Algorithms for the Channel Routing Problem
Sarrafzadeh, Majid

Thumbnail for Physical Design for Multichip Modules
Physical Design for Multichip Modules
Sriram, M.

Thumbnail for Clock distribution network techniques
Clock distribution network techniques
Chen, Shuang

Thumbnail for Modeling and Synthesis of Combinational Logic Circuits: A Power Dissipation Perspective
Modeling and Synthesis of Combinational Logic Circuits: A Power Dissipation Perspective
Chung, Ki-Seok

Thumbnail for Theoretical and computational advances in finite-size facility placement and assignment problems
Theoretical and computational advances in finite-size facility placement and assignment problems
Date, Ketan Hemant

Thumbnail for A Provably Good Linear Algorithm for Embedding Graphs in the Rectilinear Grid
A Provably Good Linear Algorithm for Embedding Graphs in the Rectilinear Grid
Tamassia, Roberto; Tollis, Ioannis G.

Thumbnail for Setmap: a soft error tolerant mapping algorithm for FPGA designs with low power
Setmap: a soft error tolerant mapping algorithm for FPGA designs with low power
Peng, Chi-Chen

Thumbnail for FPGA-Targeted High-Level Binding Algorithm for Power and Area Reduction with Glitch-Estimation
FPGA-Targeted High-Level Binding Algorithm for Power and Area Reduction with Glitch-Estimation
Cromar, Scott A.; Chen, Deming; Lee, Jaeho

Thumbnail for The Retiming and Routing of VLSI Circuits
The Retiming and Routing of VLSI Circuits
Saxena, Prashant

Thumbnail for Classifying GitHub repositories with minimal human efforts
Classifying GitHub repositories with minimal human efforts
Zhang, Yu

Thumbnail for A Gate-Level Leakage Power Reduction Method
A Gate-Level Leakage Power Reduction Method
Halter, Jonathan Paul

Thumbnail for Routing algorithms in the physical design of VLSI circuits
Routing algorithms in the physical design of VLSI circuits
Cong, Jingsheng

Thumbnail for Deep learning for cardiologist-level myocardial infarction detection in electrocadiograms
Deep learning for cardiologist-level myocardial infarction detection in electrocadiograms
Gupta, Arjun

Thumbnail for Clock tree synthesis under aggressive buffer insertion
Clock tree synthesis under aggressive buffer insertion
Chen, Ying-Yu