University of Illinois Urbana-Champaign

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Showing 1–30 of 68 items
Thumbnail for Estimating Power Dissipation in VLSI Circuits
Estimating Power Dissipation in VLSI Circuits
Najm, Farid N.

Thumbnail for Statistical Estimation of the Signal Probability in VLSI Circuits
Statistical Estimation of the Signal Probability in VLSI Circuits
Najm, Farid N.

Thumbnail for Technology Decomposition for Low-power Synthesis
Technology Decomposition for Low-power Synthesis
Panda, Rajendran Venkatachari; Najm, Farid N.

Thumbnail for Prediction of Activity Factor and Signal Probability in Domino CMOS Circuits
Prediction of Activity Factor and Signal Probability in Domino CMOS Circuits
Gupta, Subodh; Najm, Farid N.

Thumbnail for Trade-Off Curves for High-Level Design Planning and Optimization
Trade-Off Curves for High-Level Design Planning and Optimization
Najm, Farid N.

Thumbnail for Handling Signal Correlation in Computing the Transition Density in Digital Circuits
Handling Signal Correlation in Computing the Transition Density in Digital Circuits
Najm, Farid N.

Thumbnail for An Accurate and Flexible Method for Estimating the Transition Probability of a Boolean Function
An Accurate and Flexible Method for Estimating the Transition Probability of a Boolean Function
Najm, Farid N.

Thumbnail for An Extension of the Transition Density Formulation to Discrete Time Logic Signals
An Extension of the Transition Density Formulation to Discrete Time Logic Signals
Najm, Farid N.

Thumbnail for On the Tunability of a High-Level Area Model
On the Tunability of a High-Level Area Model
Büyükşahin, Kavel M.; Najm, Farid N.

Thumbnail for Probabilistic simulation for reliability analysis of VLSI circuits
Probabilistic simulation for reliability analysis of VLSI circuits
Najm, Farid Nasri

Thumbnail for Early Power Estimation for VLSI Circuits
Early Power Estimation for VLSI Circuits
Buyuksahin, Kavel M.

Thumbnail for Bottom-Up High -Level Power Modeling and Estimation
Bottom-Up High -Level Power Modeling and Estimation
Gupta, Subodh

Thumbnail for High-Level Power Estimation
High-Level Power Estimation
Nemani, Mahadevamurty

Thumbnail for Analysis and Design of Power and Ground Networks for VLSI Circuits
Analysis and Design of Power and Ground Networks for VLSI Circuits
Kozhaya, Joseph Nicolas

Thumbnail for Bottom-Up High -Level Current Macro-Models for Logic Blocks
Bottom-Up High -Level Current Macro-Models for Logic Blocks
Bodapati, Srinivas

Thumbnail for New Techniques for Probabilistic Simulation of VLSI CMOS Circuits
New Techniques for Probabilistic Simulation of VLSI CMOS Circuits
Stamoulis, Georgios I.

Thumbnail for The Complexity of Test Generation at the Transistor Level
The Complexity of Test Generation at the Transistor Level
Najm, Farid; Hajj, Ibrahim

Thumbnail for Synthesis Techniques for VLSI Low-Power Circuits
Synthesis Techniques for VLSI Low-Power Circuits
Panda, Rajendran Venkatachari

Thumbnail for Probabilistic Simulation for Reliability and Average Power Estimation
Probabilistic Simulation for Reliability and Average Power Estimation
Stamoulis, Georgios Ioannis

Thumbnail for Synthesis techniques for VLSI low-power circuits
Synthesis techniques for VLSI low-power circuits
Panda, Rajendran Venkatachari

Thumbnail for Switch-Level Test Generation for MOS VLSI Circuits
Switch-Level Test Generation for MOS VLSI Circuits
Najm, Farid Nasri

Thumbnail for A Pattern Independent Approach to Maximum Current Estimation in CMOS Circuits
A Pattern Independent Approach to Maximum Current Estimation in CMOS Circuits
Kriplani, Harish; Najm, Farid; Hajj, Ibrahim

Thumbnail for Probabilistic simulation for reliability and average power estimation
Probabilistic simulation for reliability and average power estimation
Stamoulis, Georgios Ioannis

Thumbnail for Estimation of Node Maximum Transition Density
Estimation of Node Maximum Transition Density
Zhang, Yimin

Thumbnail for Maximum Switching Activity Estimation for CMOS VLSI Circuits
Maximum Switching Activity Estimation for CMOS VLSI Circuits
Bobba, Sudhakar

Thumbnail for Statistical Power Estimation for Sequential CMOS Circuits
Statistical Power Estimation for Sequential CMOS Circuits
Saxena, Vikram

Thumbnail for Estimating Node Transition Densities with Statistical Simulation Techniques
Estimating Node Transition Densities with Statistical Simulation Techniques
Xakellis, Michael G.

Thumbnail for Monte Carlo Methods for Reliability Analysis and Power Estimation
Monte Carlo Methods for Reliability Analysis and Power Estimation
Burch, Richard Gene

Thumbnail for Worst case voltage drops in power and ground buses of CMOS VLSI circuits
Worst case voltage drops in power and ground buses of CMOS VLSI circuits
Kriplani, Harish

Thumbnail for Hierarchical electromigration reliability diagnosis for ULSI interconnects
Hierarchical electromigration reliability diagnosis for ULSI interconnects
Teng, Chin-Chi