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Academic Unit

College of Engineering 405
Graduate Dissertations and Theses at Illinois 396
Dept. of Electrical and Computer Engineering 188
Dept. of Computer Science 120
College of Liberal Arts and Sciences 55
Coordinated Science Laboratory 43
Dept. of Chemistry 20
Dept. of Mechanical Science and Engineering 15
School of Molecular and Cellular Biology 10
Dept. of Physics 9

Collection

Graduate Dissertations and Theses at Illinois 396
Dissertations and Theses - Electrical and Computer Engineering 172
Dissertations and Theses - Computer Science 99
Report - Coordinated Science Laboratory 43
Research and Tech Reports - Computer Science 21
Dissertations and Theses - Chemistry 20
Senior Theses - Electrical and Computer Engineering 16
Dissertations and Theses - Mechanical Science and Engineering 15
Dissertations and Theses - Physics 9
Dissertations and Theses - Civil and Environmental Engineering 7

Author(s)

Hwu, Wen-Mei W. 15
Chang, Pohua P. 7
University of Illinois at Urbana-Champaign. College of Engineering 5
Conte, Thomas M. 4
Alewine, N.J. 3
Blue Waters Project 3
Chen, Shyh-Kwei 3
Anik, Sadun 2
Baxter, Jeffrey John 2
Ceze, Luis H. 2

Keyword(s)

Computer Science 81
Engineering, Electronics and Electrical 57
CUDA 11
Compiler 10
Language, Linguistics 9
GPU 7
computer science 7
Compilers 6
Chemistry, Organic 5
Computer Architecture 5

Type of Resource

text 367
Thesis 59
image 6
still image 2
Image 1
Text 1

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Showing 1–30 of 508 items

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Thumbnail for Single-Pass Memory System Evaluation for Multiprogramming Workloads

Single-Pass Memory System Evaluation for Multiprogramming Workloads

Conte, Thomas M.; Hwu, Wen-Mei W.

Thumbnail for Combining Sampling with Single-Pass Techniques for Efficient Cache Simulation

Combining Sampling with Single-Pass Techniques for Efficient Cache Simulation

Conte, Thomas M.; Hwu, Wen-Mei W.

Thumbnail for Application of Compiler-Assisted Multiple Instruction Rollback Recovery to Speculative Execution

Application of Compiler-Assisted Multiple Instruction Rollback Recovery to Speculative Execution

Alewine, N.J.; Fuchs, W.K.; Hwu, W.-M.

Thumbnail for The Susceptibility of Programs to Context Switching

The Susceptibility of Programs to Context Switching

Hwu, Wen-Mei W.; Conte, Thomas M.

Thumbnail for The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors

The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors

Chang, Pohua P.; Lavery, Daniel M.; Hwu, Wen-Mei W.

Thumbnail for Compiler-Assisted Multiple Instruction Rollback Recovery Using a Read Buffer

Compiler-Assisted Multiple Instruction Rollback Recovery Using a Read Buffer

Alewine, N.J.; Chen, S.-K.; Fuchs, W.K.; Hwu, W.-M.

Thumbnail for The Effect of Code Expanding Optimizations on Instruction Cache Design

The Effect of Code Expanding Optimizations on Instruction Cache Design

Chen, William Y.; Chang, Pohua P.; Conte, Thomas M.; Hwu, Wen-Mei W.

Thumbnail for Parallel merge for many-core architectures

Parallel merge for many-core architectures

Lv, Jie

Thumbnail for Systematic Computer Architecture Prototyping

Systematic Computer Architecture Prototyping

Conte, Thomas M.

Thumbnail for Compact binning for parallel processing of limited-range functions

Compact binning for parallel processing of limited-range functions

Obeid, Nady M.

Thumbnail for IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors

IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors

Chang, Pohua P.; Mahlke, Scott A.; Chen, William Y.; Warter, Nancy J.; Hwu, Wen-Mei W.

Thumbnail for Efficient Instruction Sequencing with Inline Target Insertion

Efficient Instruction Sequencing with Inline Target Insertion

Hwu, Wen-Mei W.; Chang, Pohua P.

Thumbnail for Three Superblock Scheduling Models for Superscalar and Superpipelined Processors

Three Superblock Scheduling Models for Superscalar and Superpipelined Processors

Chang, Pohua P.; Warter, Nancy J.; Mahlke, Scott A.; Chen, William Y.; Hwu, Wen-Mei W.

Thumbnail for Automatic translation of CUDA to OpenCL and comparison of performance optimizations on GPUS

Automatic translation of CUDA to OpenCL and comparison of performance optimizations on GPUS

Nandakumar, Deepthi

Thumbnail for System Support for Implicitly Parallel Programming

System Support for Implicitly Parallel Programming

Frank, Matthew I.

Thumbnail for Compiler support for multiple-instruction-issue architectures

Compiler support for multiple-instruction-issue architectures

Chang, Po-hua

Using Profile Information to Assist Classic Code Optimizations

Chang, Pohua P.; Mahlke, Scott A.; Hwu, Wen-Mei W.

Thumbnail for Techniques for optimizing dynamic parallelism on graphics processing units

Techniques for optimizing dynamic parallelism on graphics processing units

El Hajj, Izzat

Thumbnail for Xprof: An Execution Profiler for Window-Oriented Applications

Xprof: An Execution Profiler for Window-Oriented Applications

Gupta, Aloke; Hwu, Wen-Mei W.

Thumbnail for A Systematic Approach to Delivering Instruction-Level Parallelism in EPIC Systems

A Systematic Approach to Delivering Instruction-Level Parallelism in EPIC Systems

Sias, John Wollenburg

Thumbnail for Performance portability of parallel kernels on shared-memory systems

Performance portability of parallel kernels on shared-memory systems

Stratton, John

Thumbnail for Compiling high-level scripting languages to performant code

Compiling high-level scripting languages to performant code

Dakkak, Abdul Majed

Thumbnail for Toward performance portability for CPUS and GPUS through algorithmic compositions

Toward performance portability for CPUS and GPUS through algorithmic compositions

Chang, Li-Wen

Thumbnail for Reducing Cache Misses in Numerical Applications Using Data Relocation and Prefetching

Reducing Cache Misses in Numerical Applications Using Data Relocation and Prefetching

Yamada, Yoji; Johnson, Teresa L.; Haab, Grant E.; Gyllenhaal, John C.; Hwu, Wen-Mei W.; Torrellas, Josep

Thumbnail for Techniques for enabling GPU code generation of low-level optimizations and dynamic parallelism from high-level abstractions

Techniques for enabling GPU code generation of low-level optimizations and dynamic parallelism from high-level abstractions

Garcia de Gonzalo, Simon P

Thumbnail for Modulo Scheduling for Control-Intensive General-Purpose Programs

Modulo Scheduling for Control-Intensive General-Purpose Programs

Lavery, Daniel Michael

Thumbnail for Compiler and runtime techniques for bulk-synchronous programming models on CPU architectures

Compiler and runtime techniques for bulk-synchronous programming models on CPU architectures

Kim, Hee-Seok

Thumbnail for access: v.21, no.03, Fall 2008

access: v.21, no.03, Fall 2008

National Center for Supercomputing Applications (NCSA)

Thumbnail for access: v.21, no.01, Spring 2008

access: v.21, no.01, Spring 2008

National Center for Supercomputing Applications (NCSA)

Thumbnail for Run -Time Optimization Architecture

Run -Time Optimization Architecture

Merten, Matthew Carl

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