University of Illinois Urbana-Champaign

Academic Unit
Collection
Author(s)
Keyword(s)
Type of Resource
Showing 1–30 of 37 items
Thumbnail for Size-Time Complexity of Boolean Networks for Prefix Computations
Size-Time Complexity of Boolean Networks for Prefix Computations
Bilardi, G.; Preparata, F.P.

Thumbnail for Area-Time Lower-Bound Techniques with Application to Sorting
Area-Time Lower-Bound Techniques with Application to Sorting
Bilardi, G.; Preparata, F.P.

Thumbnail for A Minimum Area VLSI Architecture for O(logn) Time Sorting
A Minimum Area VLSI Architecture for O(logn) Time Sorting
Bilardi, G.; Preparata, F.P.

Thumbnail for A Critique and an Appraisal of VLSI Models of Computation
A Critique and an Appraisal of VLSI Models of Computation
Bilardi, G.; Pracchi, M.; Preparata, F.P.

Thumbnail for The Correctness of Tison's Method for Generating Prime Implicants
The Correctness of Tison's Method for Generating Prime Implicants
Loui, Michael C.; Bilardi, Gianfranco

Thumbnail for The VLSI Optimality of the AKS Sorting Network
The VLSI Optimality of the AKS Sorting Network
Bilardi, Gianfranco; Preparata, Franco P.

Thumbnail for The Correctness of Tison's Method for Generating Prime Implicants
The Correctness of Tison's Method for Generating Prime Implicants
Loui, Michael C.; Bilardi, Gianfranco

Thumbnail for The mesh of trees architecture for parallel computation
The mesh of trees architecture for parallel computation
Hornick, Scot W.

Thumbnail for The Mesh of Trees Architecture for Parallel Computation
The Mesh of Trees Architecture for Parallel Computation
Hornick, Scot Wayne

Thumbnail for On Problem Transformability in VLSI
On Problem Transformability in VLSI
Hornick, Scot; Sarrafzadeh, Majid

Thumbnail for Average Case Analysis of an Adjacency Map Searching Technique
Average Case Analysis of an Adjacency Map Searching Technique
Bilardi, Gianfranco

Thumbnail for Hierarchical Approaches to Vlsi Circuit Layout
Hierarchical Approaches to Vlsi Circuit Layout
Sarrafzadeh, Majid

Thumbnail for The Communication Complexity of Distributed Computing and a Parallel Algorithm for Polynomial Roots
The Communication Complexity of Distributed Computing and a Parallel Algorithm for Polynomial Roots
Tiwari, Prasoon

Thumbnail for The Communication Complexity of Distributed Computing and a Parallel Algorithm for Polynomial Roots
The Communication Complexity of Distributed Computing and a Parallel Algorithm for Polynomial Roots
Tiwari, Prasoon

Thumbnail for Histogram sort with sampling
Histogram sort with sampling
Vipul Harsh, -

Thumbnail for Exploiting Locality and Parallelism with Hierarchically Tiled Arrays
Exploiting Locality and Parallelism with Hierarchically Tiled Arrays
Guo, Jia

Thumbnail for Optimal VLSI Graph Embeddings in Variable Aspect Ratio Rectangles
Optimal VLSI Graph Embeddings in Variable Aspect Ratio Rectangles
Czerwinski, Paul

Thumbnail for A Unified Approach to the Analysis and Synthesis of Systolic Arrays
A Unified Approach to the Analysis and Synthesis of Systolic Arrays
Hornick, Scot Wayne

Thumbnail for Exploiting Locality and Parallelism With Hierarchically Tiled Arrays
Exploiting Locality and Parallelism With Hierarchically Tiled Arrays
Guo, Jia

Thumbnail for Modeling and Extraction of Interconnect Parameters in Very-Large-Scale Integrated Circuits
Modeling and Extraction of Interconnect Parameters in Very-Large-Scale Integrated Circuits
Yuan, Chen-Ping

Thumbnail for Parametric and Termination-Sensitive Control Dependence
Parametric and Termination-Sensitive Control Dependence
Chen, Feng; Rosu, Grigore

Thumbnail for Modeling and Extraction of Interconnect Parameters in Very-Large-Scale Integrated Circuits
Modeling and Extraction of Interconnect Parameters in Very-Large-Scale Integrated Circuits
Yuan, Chen-Ping

Thumbnail for Predicting Concurrency Errors at Runtime using Sliced Causality
Predicting Concurrency Errors at Runtime using Sliced Causality
Chen, Feng; Rosu, Grigore

Thumbnail for Scalable collective message-passing algorithms
Scalable collective message-passing algorithms
Sack, Paul

Thumbnail for Algorithms for VLSI Layout
Algorithms for VLSI Layout
Tollis, Ioannis Georgios

Thumbnail for Algorithms for VLSI Layout
Algorithms for VLSI Layout
Tollis, Ioannis Georgios

Thumbnail for Optimization and Testing of Nmos Arithmetic Structures (Vlsi, Mos)
Optimization and Testing of Nmos Arithmetic Structures (Vlsi, Mos)
Montoye, Robert Kevin

Thumbnail for Crosstalk Noise and Timing Analysis of Digital VLSI Circuits With Coupled Interconnects
Crosstalk Noise and Timing Analysis of Digital VLSI Circuits With Coupled Interconnects
Lu, Ninglong

Thumbnail for Isotropic graphs with applications to parallel computation
Isotropic graphs with applications to parallel computation
Piertracaprina, Andrea

Thumbnail for Compilation of Register Transfer Language Descriptions Into Silicon
Compilation of Register Transfer Language Descriptions Into Silicon
Bilgory, Avinoam