University of Illinois Urbana-Champaign

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Showing 91–120 of 157 items
Thumbnail for Evaluating the performance of high-level synthesis tools across languages: A case study on convolutional neural network on FPGA
Evaluating the performance of high-level synthesis tools across languages: A case study on convolutional neural network on FPGA
Kim, Dae Hee

Thumbnail for Techniques for communication optimization of parallel programs in an adaptive runtime system
Techniques for communication optimization of parallel programs in an adaptive runtime system
Robson, Michael P

Thumbnail for Efficient, expressive, and effective runtime verification
Efficient, expressive, and effective runtime verification
Meredith, Patrick

Thumbnail for Simple Neuronal Implementation of Self Organizing Maps
Simple Neuronal Implementation of Self Organizing Maps
Findlay, Junia

Thumbnail for Implementing neural machine translator with bi-directional GRU and attention mechanism on FPGAS using HLS
Implementing neural machine translator with bi-directional GRU and attention mechanism on FPGAS using HLS
Li, Qin

Thumbnail for
"""Blue box"" power electronics control modules for laboratory-based education."
Balog, Robert; Kimball, J.W.; Sorchini, Z.; Krein, P.T.; Chapman, Patrick L.

Thumbnail for Heterogeneous system and application communication modeling
Heterogeneous system and application communication modeling
Pearson, Carl

Thumbnail for Performance portability of parallel kernels on shared-memory systems
Performance portability of parallel kernels on shared-memory systems
Stratton, John

Thumbnail for Industrial Application of the System-Level Simplex Architecture for Real-Time Embedded System Safety
Industrial Application of the System-Level Simplex Architecture for Real-Time Embedded System Safety
Bak, Stanley

Thumbnail for Development and implementation of an open-box distribution-level phasor measurement unit
Development and implementation of an open-box distribution-level phasor measurement unit
Pinte, Bogdan

Thumbnail for An online power loss calculation framework for IGBTs in a three-phase inverter
An online power loss calculation framework for IGBTs in a three-phase inverter
Wu, Michael

Thumbnail for Verifiable COTS-based cyber-physical systems
Verifiable COTS-based cyber-physical systems
Bak, Stanley

Thumbnail for FPGA acceleration of short read alignment with high-level synthesis
FPGA acceleration of short read alignment with high-level synthesis
Chen, Daniel E

Thumbnail for Advanced Quantum Communication Systems
Advanced Quantum Communication Systems
Jeffrey, Evan Robert

Thumbnail for Search for Bc+ -> Bs0 pi+, Bs0 -> J/psi phi decays at the CDF II detector
Search for Bc+ -> Bs0 pi+, Bs0 -> J/psi phi decays at the CDF II detector
Rogers, Edwin L.

Thumbnail for Secure and dependable cyber-physical system architectures
Secure and dependable cyber-physical system architectures
Yoon, Man Ki

Thumbnail for BUILDING CUSTOMIZED RISC-V SOC WITH SYSTOLIC ARRAY OPTIMIZED FOR SPECIALIZED MATRIX MULTIPLICATION
BUILDING CUSTOMIZED RISC-V SOC WITH SYSTOLIC ARRAY OPTIMIZED FOR SPECIALIZED MATRIX MULTIPLICATION
Zhang, Haiyang

Thumbnail for Hardware security design from circuits to systems
Hardware security design from circuits to systems
Konigsmark, Sven Tenzing Choden

Thumbnail for Optical quantum random number generation: applications of single-photon event timing
Optical quantum random number generation: applications of single-photon event timing
Wayne, Michael Alan

Thumbnail for A cross-stack, network-centric architectural design for next-generation datacenters
A cross-stack, network-centric architectural design for next-generation datacenters
Alian, Mohammad

Thumbnail for Compact integrity-aware architectures
Compact integrity-aware architectures
LeMay, Michael D.

Thumbnail for Tutorial on designing and simulating a truncation spurs-free direct digital synthesizer (DDS) on a field-programmable gate array (FPGA)
Tutorial on designing and simulating a truncation spurs-free direct digital synthesizer (DDS) on a field-programmable gate array (FPGA)
Li, Shuo

Thumbnail for Proceedings Work-In-Progress Session of the 20th Euromicro Conference on Real-Time Systems
Proceedings Work-In-Progress Session of the 20th Euromicro Conference on Real-Time Systems
Caccamo, Marco

Thumbnail for A high performance graphics system for the personal computer
A high performance graphics system for the personal computer
Lee, Kevin Garth

Thumbnail for Phase noise and spur reduction in an array of direct digital synthesizers
Phase noise and spur reduction in an array of direct digital synthesizers
Comberiate, Thomas M.

Thumbnail for Reliable health monitoring: a commercial off-the-shelf and a field programmable hardware approach
Reliable health monitoring: a commercial off-the-shelf and a field programmable hardware approach
Cheriyan, Ajay M.

Thumbnail for Redefining the hardware-software boundary in networked systems
Redefining the hardware-software boundary in networked systems
Mochizuki, Brent A.

Thumbnail for Efficient design and optimized crash-consistency support for hybrid memory systems
Efficient design and optimized crash-consistency support for hybrid memory systems
Abulila, Ahmed Helmi

Thumbnail for Statistical Error Compensation for Robust Digital Signal Processing and Machine Learning
Statistical Error Compensation for Robust Digital Signal Processing and Machine Learning
Kim, Eric Park

Thumbnail for Movement and placement of non-contiguous data in distributed GPU computing
Movement and placement of non-contiguous data in distributed GPU computing
Pearson, Carl