University of Illinois Urbana-Champaign

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Showing 61–90 of 1,930 items
Thumbnail for Maximum Switching Activity Estimation for CMOS VLSI Circuits
Maximum Switching Activity Estimation for CMOS VLSI Circuits
Bobba, Sudhakar

Thumbnail for Symbolic Switch-Level Logic and Fault Simulation of MOS VLSI Circuits
Symbolic Switch-Level Logic and Fault Simulation of MOS VLSI Circuits
Saab, Daniel Georges

Thumbnail for Compact Representation of the Separating k-Sets of a Graph
Compact Representation of the Separating k-Sets of a Graph
Kanevsky, Arkady

Thumbnail for Dynamic Fault Collapsing in Fault Simulation
Dynamic Fault Collapsing in Fault Simulation
Chandra, Susheel Jagdish

Thumbnail for Fast Logic Implication Discovery
Fast Logic Implication Discovery
Newquist, Jeffrey Aaron

Thumbnail for Fault Dictionary Compaction Using Structural and Tree-Based Techniques
Fault Dictionary Compaction Using Structural and Tree-Based Techniques
Boppana, Vamsi

Thumbnail for The Use of Parallel Processing in VLSI Computer-Aided Design Applications
The Use of Parallel Processing in VLSI Computer-Aided Design Applications
Banerjee, Prith

Thumbnail for The Mesh of Trees Architecture for Parallel Computation
The Mesh of Trees Architecture for Parallel Computation
Hornick, Scot Wayne

Thumbnail for The Design and Implementation of a Workbench for Application Specific Message-Passing Parallel Reconfigurable Architectures
The Design and Implementation of a Workbench for Application Specific Message-Passing Parallel Reconfigurable Architectures
Hwang, Kou-Rey David

Thumbnail for High Level Test Generation Using Software Testing Metrics
High Level Test Generation Using Software Testing Metrics
Johnson, Mark Willard

Thumbnail for Variable-Delay Event-Driven Logic and Fault Simulation
Variable-Delay Event-Driven Logic and Fault Simulation
Hsiao, Michael Shaun

Thumbnail for An Accurate Timing Model for Fault Simulation in MOS Circuits
An Accurate Timing Model for Fault Simulation in MOS Circuits
Kim, Sungho

Thumbnail for The Design and Simulation of a Fault-Tolerant Interconnection Network for Multiprocessor Systems
The Design and Simulation of a Fault-Tolerant Interconnection Network for Multiprocessor Systems
Dugar, Abhijeet

Thumbnail for A Simulation and Redesign System for Circuit Hot-Carrier Reliability
A Simulation and Redesign System for Circuit Hot-Carrier Reliability
Li, Ping-Chung

Thumbnail for Rule-Based Circuit Optimization for CMOS VLSI
Rule-Based Circuit Optimization for CMOS VLSI
Lai, Feipei

Thumbnail for Simulation-Based Techniques for Sequential Circuit Testing
Simulation-Based Techniques for Sequential Circuit Testing
Rudnick, Elizabeth Marie

Thumbnail for Development of an Automatic Test Pattern Generation Package
Development of an Automatic Test Pattern Generation Package
Patel, Sanjaykumar Thakorbhai

Thumbnail for Sequential Circuit Test Generation Using Genetic Techniques
Sequential Circuit Test Generation Using Genetic Techniques
Hsiao, Michael Shaun

Thumbnail for Diagnosis of Delay Faults in Sequential Circuits
Diagnosis of Delay Faults in Sequential Circuits
Sunder, Srinivas

Thumbnail for Parallel Processing for VLSI CAD Applications a Tutorial
Parallel Processing for VLSI CAD Applications a Tutorial
Banerjee, Prith

Thumbnail for Combinatorial Optimization by Stochastic Evolution with Applications to the Physical Design of VLSI Circuits
Combinatorial Optimization by Stochastic Evolution with Applications to the Physical Design of VLSI Circuits
Saab, Youssef Georges

Thumbnail for L-PROOFS: A Leakage-Fault Simulator for CMOS Circuits
L-PROOFS: A Leakage-Fault Simulator for CMOS Circuits
Gruner, Frederick Russell

Thumbnail for A Compiled, Event-Driven Behavioral VHDL Simulator
A Compiled, Event-Driven Behavioral VHDL Simulator
Skarpness, Mark Lee

Thumbnail for Vertex Connectivity of Graphs: Algorithms and Bounds
Vertex Connectivity of Graphs: Algorithms and Bounds
Kanevsky, Arkady

Thumbnail for Statistical Error Compensation for Robust Digital Signal Processing and Machine Learning
Statistical Error Compensation for Robust Digital Signal Processing and Machine Learning
Kim, Eric Park

Thumbnail for ICs : The Driver for Information Technology
ICs : The Driver for Information Technology
Feng, Milton; Shanbhag, Naresh; Chiu, Yun; Chen, Deming; Rosenbaum, Elyse; Wong, Martin

Thumbnail for Automatic Test Generation for Bit-serial VLSI Digital Signal Processors
Automatic Test Generation for Bit-serial VLSI Digital Signal Processors
Roy, Rabindra Kumar

Thumbnail for Parallel Testing for Pattern Sensitive Faults in Semiconductor Random Access Memory
Parallel Testing for Pattern Sensitive Faults in Semiconductor Random Access Memory
Mazumder, Pinaki; Patel, Janak H.

Thumbnail for Logic and Fault Simulation of VLSI Circuits Including Hierarchical Techniques
Logic and Fault Simulation of VLSI Circuits Including Hierarchical Techniques
Saab, Daniel Georges

Thumbnail for On the Number of Minimum Size Separating Vertex Sets in a Graph
On the Number of Minimum Size Separating Vertex Sets in a Graph
Kanevsky, Arkady