University of Illinois Urbana-Champaign

2D material devices for low power logic and memory applications

Yap, Wui Chung

Content Files
YAP-THESIS-2016.pdf

Permalink

https://hdl.handle.net/2142/95528

Description

Title
2D material devices for low power logic and memory applications
Author(s)
Yap, Wui Chung
Issue Date
2016-07-14
Director of Research (if dissertation) or Advisor (if thesis)
Zhu, Wenjuan
Department of Study
Electrical & Computer Eng
Discipline
Electrical & Computer Engr
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Date of Ingest
2017-03-01T16:37:14Z
Keyword(s)
  • 2D materials
  • Low power
Abstract
This thesis investigates low power tunneling field effect transistors (task 1) and low power ferroelectric memory devices (task 2) based on two-dimensional (2D) materials. In the first task, electrical characteristics of mechanically exfoliated n-type Molybdenum Disulfide (MoS2 ) and a new p-type material Germanium Selenide (GeSe) were investigated. The pn junctions based on GeSe/MoS2 heterostructures were fabricated and showed excellent rectifying characteristics, demonstrating for the first time the viability of using GeSe/MoS2 heterostructures as 2D pn junctions. In the second project, 2D material ferroelectric field effect transistors (FeFETs), with MoS2 as the channel material and doped Hafnium Oxide (HfO2) as the ferroelectric gate dielectrics were explored. The electrical characteristics revealed a ferroelectric memory window, and effects associated with ferroelectric materials such as the wake-up effect and polarization fatigue were observed. Future research in both projects can potentially lead to advances of 2D materials in low power logic and memory applications.
Graduation Semester
2016-12
Type of Resource
text
Permalink
http://hdl.handle.net/2142/95528
Copyright and License Information
Copyright 2016 Wui Chung Yap

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