Differential power processing for series-stacked processors
Stillwell, Andrew R
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https://hdl.handle.net/2142/88081
Description
Title
Differential power processing for series-stacked processors
Author(s)
Stillwell, Andrew R
Issue Date
2015-07-21
Director of Research (if dissertation) or Advisor (if thesis)
Pilawa, Robert
Department of Study
Electrical & Computer Engineering
Discipline
Electrical & Computer Engineering
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Keyword(s)
power
switched-capacitor
Abstract
The series-stacked architecture provides a method to increase power delivery efficiency to multiple processors. With a series-stack, differential power processing (DPP) is needed to ensure that processor voltages remain within design limits as the individual loads vary. This work demonstrates a switched-capacitor (SC) converter to balance a stack of four ARM Cortex-A8 based embedded computers. A model of a series-stack with no DPP is first discussed for the case when loads can be controlled with no power electronics. We investigate hard-switched and resonant modes of operation in a ladder SC DPP converter, implemented with GaN transistors. Excellent 5 V regulation of each embedded computer is demonstrated in a 4-series-stack configuration, with realistic computational workloads. Moreover, we demonstrate hot-swapping of individual computers with maintained voltage regulation at all nodes. A peak stack power delivery of 99.8% is demonstrated, and DPP switching frequencies from 250 kHz to 2 MHz. Finally, the reliability of a series-stacked system is compared to an electrically parallel system.
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