Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits
Veneris, Andreas Georgios
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Permalink
https://hdl.handle.net/2142/81937
Description
Title
Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits
Author(s)
Veneris, Andreas Georgios
Issue Date
1998
Doctoral Committee Chair(s)
Hajj, Ibrahim N.
Department of Study
Computer Science
Discipline
Computer Science
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Computer Science
Language
eng
Abstract
Our experimental results show that our algorithms have good error resolution and run-time performance as they are able to rectify designs with one, two and three errors within minutes of CPU time. In addition, our experiments suggest that diagnosis and correction of multiple design errors with input test-vector simulation is an attractive alternative to symbolic techniques. This makes our test-vector simulation based methods applicable to designs where a symbolic representation might not be available.
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