Superthreading: Integrating Compilation Technology and Processor Architecture for Cost-Effective Concurrent Multithreading
Tsai, Jenn-Yuan
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https://hdl.handle.net/2142/81920
Description
Title
Superthreading: Integrating Compilation Technology and Processor Architecture for Cost-Effective Concurrent Multithreading
Author(s)
Tsai, Jenn-Yuan
Issue Date
1998
Doctoral Committee Chair(s)
Yew, Pen-Chung
Department of Study
Computer Science
Discipline
Computer Science
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Engineering, Electronics and Electrical
Language
eng
Abstract
In this thesis we also present the compiler techniques for superthreaded processors. Many existing compiler techniques used in traditional parallelizing compilers for multiprocessors as well as some specific compiler techniques for superthreaded processors are needed for generating superthreaded codes and enhancing parallelism between threads. We evaluate the performance of the superthreaded architecture with a trace-driven, cycle-by-cycle superthreaded processor simulator by using codes transformed by hand and codes generated by our superthreading compiler prototype. The simulation results show that a superthreaded processor can achieve good performance by exploiting both thread-level and instruction-level parallelism in programs.
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