This item is only available for download by members of the University of Illinois community. Students, faculty, and staff at the U of I may log in with your NetID and password to view the item. If you are trying to access an Illinois-restricted dissertation or thesis, you can request a copy through your library's Inter-Library Loan office or purchase a copy directly from ProQuest.
Permalink
https://hdl.handle.net/2142/81882
Description
Title
Parallel Algorithms for VHDL Simulation
Author(s)
Krishnaswamy, Venkatram
Issue Date
1997
Doctoral Committee Chair(s)
Banerjee, Prithviraj
Department of Study
Computer Science
Discipline
Computer Science
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Engineering, Electronics and Electrical
Language
eng
Abstract
We finally settled on a partitioning based approach to parallelization. This technique gives us acceptable speedups, if the partitioning and placement of partitions on processors is done carefully. Partitioning and placement issues are examined thoroughly in this thesis.
Use this login method if you
don't
have an
@illinois.edu
email address.
(Oops, I do have one)
IDEALS migrated to a new platform on June 23, 2022. If you created
your account prior to this date, you will have to reset your password
using the forgot-password link below.
