Chip Multiprocessors With Speculative Multithreading: Design for Performance and Energy Efficiency
Renau, Jose
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https://hdl.handle.net/2142/81651
Description
Title
Chip Multiprocessors With Speculative Multithreading: Design for Performance and Energy Efficiency
Author(s)
Renau, Jose
Issue Date
2004
Doctoral Committee Chair(s)
Torrellas, Josep
Department of Study
Computer Science
Discipline
Computer Science
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Computer Science
Language
eng
Abstract
Experiments with the SpecInt 2000 codes show that a CMP with 4 3-issue cores and support for SM delivers a speedup of 1.27 over a 3-issue superscalar. The SM CMP is even faster than a 6-issue superscalar at the same frequency, and consumes only 85% of its power. In fact, for the same average power in both chips, the SM CMP is 1.13 times faster than the 6-issue superscalar on average.
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