Low-Power Reconfigurable Digital Signal Processing
Goel, Manish
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Permalink
https://hdl.handle.net/2142/81349
Description
Title
Low-Power Reconfigurable Digital Signal Processing
Author(s)
Goel, Manish
Issue Date
2000
Doctoral Committee Chair(s)
Naresh Shanbhag
Department of Study
Electrical Engineering
Discipline
Electrical Engineering
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Engineering, Electronics and Electrical
Language
eng
Abstract
We present a design methodology for low-power communication systems. This is based on the concept of DAT and intellectual property (IP) core generators. Energy-optimum parameters are obtained via DAT, and are fed into IP core generators, which generate a synthesizable VHDL description of the IP core. The IP cores are synthesized via commercial logic synthesis tools. The proposed design methodology has been applied to generate receiver gate-level netlist for several channels including the microwave and cable channels.
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