A Sub-0.1-Micron PtSi Schottky Source/drain MOSFET
Wang, Chinlee
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Permalink
https://hdl.handle.net/2142/81234
Description
Title
A Sub-0.1-Micron PtSi Schottky Source/drain MOSFET
Author(s)
Wang, Chinlee
Issue Date
1998
Doctoral Committee Chair(s)
Tucker, John R.
Department of Study
Electrical Engineering
Discipline
Electrical Engineering
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Engineering, Electronics and Electrical
Language
eng
Abstract
The devices are fabricated with lightly doped silicon substrates, 19-A to 34-A gate oxide, $\sim$0.05-$\mu$um gate lithography, 100-A sidewall oxides, self-aligned PtSi, and no intentional doping. The thin gate and sidewall oxides enable high field emission currents at low voltages. These devices exhibit on-state currents of 200-400 $\mu$A/$\mu$m and on-off ratios of 20 to 50. Cryogenic refrigeration of the devices reduce the off-state leakage current by several orders of magnitude.
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