Drifting -Dipole Noise Model of Nanometer MOSFETs for Radio Frequency Integrated Circuit Design
Nguyen, Giang Dong
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https://hdl.handle.net/2142/81155
Description
Title
Drifting -Dipole Noise Model of Nanometer MOSFETs for Radio Frequency Integrated Circuit Design
Author(s)
Nguyen, Giang Dong
Issue Date
2009
Doctoral Committee Chair(s)
Feng, Milton
Chiu, Yun
Department of Study
Electrical and Computer Engineering
Discipline
Electrical and Computer Engineering
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Engineering, Electronics and Electrical
Language
eng
Abstract
As the MOSFET is scaled down, the lateral field across the device channel becomes comparable to, or even exceeds, the vertical field. The device can no longer be considered as operating under equilibrium condition, and the thermal noise theory is no longer applicable to predicting its performance. This work describes a new noise formulation that takes into account high-field effects by using the concept of unrelaxable drifting dipoles. The proposed noise model is verified for single devices as well as for integrated circuits. Excellent fitting results are achieved for the measured noise parameters of single 120-nm MOSFETs. For circuit validation, two high-performance low-noise amplifiers (LNA) have been demonstrated. The 3.1--10.6 GHz Ultra Wideband LNA shows very low noise figures NF of 3.5 to 4.3 dB as well as superior input-referred third-order interception points IIP 3 of 3.5 to 5.2 dBm across the design bandwidth. The other circuit, a 24-GHz LNA, achieves a gain of 19 dB, the highest gain published to date at this frequency band, while maintaining a comparative noise figure NF of 3.8 dB.
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