Low Temperature Selective Silicon Epitaxy at the Nanometer Scale
Sztelle, Matthew Mark
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https://hdl.handle.net/2142/81104
Description
Title
Low Temperature Selective Silicon Epitaxy at the Nanometer Scale
Author(s)
Sztelle, Matthew Mark
Issue Date
2008
Doctoral Committee Chair(s)
Lyding, Joseph W.
Department of Study
Electrical and Computer Engineering
Discipline
Electrical and Computer Engineering
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Engineering, Electronics and Electrical
Language
eng
Abstract
A technique for providing low-temperature, nanometer scale, selective silicon epitaxy using the hydrogen-passivated silicon surface as a lithographic mask has been developed. The STM tip is used to define chemically reactive templates on the monohydride Si(100) surface at temperatures below the monohydride desorption peak, 540 °C. Disilane gas is used to deposit silicon and silicon-hydride species on the exposed clean silicon. For low temperatures (1.0x10-8 Torr) the STM tip can be used to remove hydrogen, allowing epitaxy to occur and a fresh silicon surface to be exposed. Repeating this cycle promotes epitaxial growth. At higher temperatures (>177 °C) and lower disilane pressures (≤2.5x10 -9 Torr) short-clean silicon islands form without requiring the STM tip to remove hydrogen in the patterned regions at temperatures below the dihydride desorption peak, 425 °C, thereby adding a processing variable. At sufficient temperatures (310 °C), silicon field-evaporated from the tip may form into an epitaxial film; using this technique, a bilayer of epitaxial growth is demonstrated. The STM tip is used to modify the edges of this structure through the hydrogen removal and selective deposition technique. Also discussed will be the reasonable temperature limits for pattern fidelity.
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