Analysis and Design of Soft-Error Tolerant Circuits
Zhang, Ming
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https://hdl.handle.net/2142/80968
Description
Title
Analysis and Design of Soft-Error Tolerant Circuits
Author(s)
Zhang, Ming
Issue Date
2006
Doctoral Committee Chair(s)
Shanbhag, Naresh R.
Department of Study
Electrical and Computer Engineering
Discipline
Electrical and Computer Engineering
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Engineering, Electronics and Electrical
Language
eng
Abstract
We propose a cost-effective testing scheme for verification of proof-of-concept soft-error tolerant designs. It is based on the observation that crosstalk noise can be intentionally introduced into a dense layout to emulate SETS. It has been implemented on a test chip featuring the TPTT technique.
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