Reliable and Low -Power Signal Processing via Algorithmic Noise -Tolerance
Hegde, Rajamohana M.
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https://hdl.handle.net/2142/80762
Description
Title
Reliable and Low -Power Signal Processing via Algorithmic Noise -Tolerance
Author(s)
Hegde, Rajamohana M.
Issue Date
2002
Doctoral Committee Chair(s)
Shanbhag, Naresh R.
Department of Study
Electrical and Computer Engineering
Discipline
Electrical and Computer Engineering
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Engineering, Electronics and Electrical
Language
eng
Abstract
In this dissertation, we address the problem of designing reliable and low-power VLSI systems for communications and DSP applications. An information theoretic framework to derive the lower bound on energy dissipation of VLSI circuits in presence of deep submicron noise is presented. It is shown that error-control coding can be employed to approach these bounds. We introduce algorithmic noise-tolerance (ANT) which is employing error-control at the algorithmic level to achieve reliable operation in presence of noise. We introduce voltage overscaling where the supply voltage is reduced beyond the limit imposed by the critical path delay to reduce energy dissipation. The resulting degradation in algorithmic performance is restored by employing ANT, thereby achieving energy savings while meeting the algorithmic performance specifications.
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