Circuit Simulation Models for the High Electron Mobility Transistor
Cioffi, Kenneth Robert
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Permalink
https://hdl.handle.net/2142/69369
Description
Title
Circuit Simulation Models for the High Electron Mobility Transistor
Author(s)
Cioffi, Kenneth Robert
Issue Date
1987
Doctoral Committee Chair(s)
Trick, Timothy N.
Department of Study
Electrical Engineering
Discipline
Electrical Engineering
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Engineering, Electronics and Electrical
Abstract
The high electron mobility transistor (HEMT) is one of the fastest switching devices available today. In order to best utilize its capabilities one must be able to simulate its behavior in electronic circuits. This requires an efficient and accurate mathematical model for both dc and ac analysis which must be installed in a general purpose circuit simulation program. In this thesis, two such models which accomplish these purposes are presented.
The semiempirical model has been designed to be as simple as possible. The model takes advantage of the similarity of HEMTs to MOSFETs and is the first charge-based model to be proposed for the device. The variation of the channel mobility vs. gate voltage, not previously taken into account by any model, is described by a simple analytical term presented in this thesis. The model is computationally efficient and can therefore be used for the simulation of large circuits as demonstrated. Non-quasi-static behavior is shown to be included in the model.
A second model based on the device physics which can be used for device design as well as circuit analysis is introduced. The model proposes a new term which analytically models the channel charge vs. gate-to-channel voltage characteristic. The model is non-quasi-static and charge-based like the semiempirical model. It is shown to accurately characterize digital transients. An example is also given of device design optimization using the model.
Analytical expressions are derived based on two-dimensional simulation for the parasitic interelectrode capacitances. These equations along with the voltage dependent fringe capacitance equations of the gate electrode describe the non-channel capacitances of both models. The voltage dependency of the fringe capacitances has not been modeled previously. Optimum device distances are predicted which minimize parasitic effects utilizing these equations.
Both models have been installed in the general purpose circuit simulation program iSMILE which allows easy implementation of device models. Results of both dc and ac operation for both models are presented. The models are shown to offer distinct improvement in both simulation speed and accuracy over previous circuit simulation models for the HEMT.
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