A compact model for silicon controlled rectifiers in low voltage CMOS processes
Mertens, Robert
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https://hdl.handle.net/2142/49624
Description
Title
A compact model for silicon controlled rectifiers in low voltage CMOS processes
Author(s)
Mertens, Robert
Issue Date
2014-05-30T16:52:57Z
Director of Research (if dissertation) or Advisor (if thesis)
Rosenbaum, Elyse
Department of Study
Electrical & Computer Eng
Discipline
Electrical & Computer Engr
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Keyword(s)
Complementary metal–oxide–semiconductor (CMOS)
integrated circuits
silicon
silicon controlled rectifiers (SCR)
Electrostatic discharge (ESD)
Abstract
This thesis presents an SCR compact model for simulating ESD protection circuits. The aspects of the compact model that are necessary to reproduce measurement data, such as quasi-static I-V curves and transient voltage overshoot, are discussed. These aspects include conductivity modulation of the well resistances in the SCR, impact ionization at the N-well/P-well junction, and the influence of electric fields in the well region on carrier diffusion between the anode and cathode. Further, a detailed validation of the compact model is presented. A methodology for parameter extraction is also discussed.
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