Exposing Memory Access Locality in Parallel Architectures
Colombo, Greg
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https://hdl.handle.net/2142/47072
Description
Title
Exposing Memory Access Locality in Parallel Architectures
Author(s)
Colombo, Greg
Contributor(s)
Lumetta, Steve
Issue Date
2008-05
Keyword(s)
computer memory
memory access
computer architecture
parallel architecture
parallel processing
massively parallel processing
Abstract
This work explores the tradeoffs of the memory system of a new massively parallel multiprocessor in view
of the difficulties it presents to programmers. The architecture under consideration groups processing
elements together into octets that share a local cache and locally buffer the lines read from that cache as
they are accessed and broadcast. Such a system is most effective when applications’ memory accesses
are arranged to maximize spatial and temporal locality. The discussion centers on programmers’ ability
to arrange their programs in this way without resorting to writing significant chunks of code in assembly
language. We show that in many cases it is possible to improve application performance by unrolling
loops, reordering memory accesses, and using the register file as a small, fast memory. The practicality of
these techniques and the possibility of automating this work are also discussed.
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