Top-down approaches for the fabrication of semiconductor micro/nano scale elements consist of a series of strategies that use lithographically patterned wafers for generating semiconducting structures in forms ranging from wires, ribbons, bars and platelets. Recently, the use of top-down approaches for applications in large area flexible electronics has generated a great deal of interest due to the ability to integrate certain structural forms with thin plastic sheets. This report will describe (i) the research topic and goals of this work, (ii) procedures for the fabrication of silicon microstructures, (iii) initial solar cell results, (iv) stretchable PV, (v) high voltage mini module.
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