A Practical Error-Correcting Code Approach for the Exponential Server Timing Channel
Li, Christopher
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https://hdl.handle.net/2142/46995
Description
Title
A Practical Error-Correcting Code Approach for the Exponential Server Timing Channel
Author(s)
Li, Christopher
Contributor(s)
Coleman, Todd P.
Issue Date
2010-05
Keyword(s)
error correcting codes
single-server queue
exponential server timing channel
low-density parity check codes
Abstract
We present an approach towards developing simple error-correcting codes
for the single-server queue known as the exponential server timing channel
(ESTC). The focus of this thesis is to apply the memoryless proof of the
ESTC by Coleman in [2] to encode and decode packets of information using
low-density parity check (LDPC) codes. The key to low-complexity decoding
and encoding in this approach is using the intermediate queue state as
a suffi cient statistic for the ESTC channel on [0; nT]. Moreover, we demonstrate
the robustness of the approach in [1] by simulation and observe that
increasingly reliable performance is achieved with larger finite field size of
the LDPC code.
Most of the material and notation presented in Chapters 1 and 2 comes
from previous work by Coleman [1]. The purpose of these chapters is to give
an overview of the information theory behind this thesis. Chapter 1 contains
an introduction to the ESTC. We also briefly
discuss the application of
communications via timing channels such as the ESTC towards information
hiding. In addition, we discuss recent work pertaining to the development
of error-correcting codes for the ESTC. In particular, we give an overview
of the work in [1] and explain why it is relevant to our error-correcting code
approach.
In Chapter 2, we discuss our error-correcting code approach using results
from [1]. Here, we also use the time-rescaling theorem from point process
theory to demonstrate how we can simulate the ESTC in continuous time
with discrete increments of time.
Chapter 3 contains the material that is the central focus of this thesis.
Here, we present and discuss simulation results that show how symbol error
rate performs as rate approaches capacity. In this chapter, we note that
in particular, larger finite field size of the error-correcting code improves
performance. We also explain some shortcomings in our simulation results.
In Chapter 4, we make conclusions based on simulation results and discuss
future work in areas related to error-correcting codes for the ESTC.
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