Planar nanowire high electron mobility transistor and down-scaling of planar nanowire
Miao, Xin
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https://hdl.handle.net/2142/45391
Description
Title
Planar nanowire high electron mobility transistor and down-scaling of planar nanowire
Author(s)
Miao, Xin
Issue Date
2013-08-22T16:38:48Z
Director of Research (if dissertation) or Advisor (if thesis)
Li, Xiuling
Department of Study
Electrical & Computer Eng
Discipline
Electrical & Computer Engr
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Keyword(s)
Gallium Arsenide (GaAs)
planar nanowire
High Electron Mobility Transistor (HEMT)
III-V
Very-large-scale integration (VLSI)
micro-tube
resonator
Abstract
Monolithically grown planar nanowire (NW) high electron mobility transistors (NW-HEMTs) have been demonstrated with self-aligned <110> planar GaAs NW channels capped by a thin film AlGaAs barrier. The planar NW-HEMTs exhibit uniform and scalable DC characteristics; and resolve the electrical non-uniformity issues in VLS grown NW-FETs with doped NW channels. Growth optimization through mapping the parameters of group III flow, V/III ratio and temperature has also been successfully done for the realization of high-quality down-scaled planar GaAs NWs with widths as small as 35 nm. With further development of our planar NW technology, wafer-scale low-power and high-speed VLSI circuits involving 3D planar NW channel from the bottom-up is promising.
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