Code-error calibration techniques for two-step flash analog-to-digital converters
Lee, Seung-Hoon
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https://hdl.handle.net/2142/23592
Description
Title
Code-error calibration techniques for two-step flash analog-to-digital converters
Author(s)
Lee, Seung-Hoon
Issue Date
1991
Doctoral Committee Chair(s)
Song, Bang-Sup
Department of Study
Engineering, Electronics and Electrical
Discipline
Engineering, Electronics and Electrical
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Engineering, Electronics and Electrical
Language
eng
Abstract
Flash-type analog-to-digital converters (ADCs) have been extensively used for high-speed applications such as high-performance TVs, image recognition, radar, and medical instrumentation. However, the linearity of these state-of-the-art flash-type ADCs has been limited to 10 bits by ratio mismatch of passive components. Although techniques such as laser-trimming, self-calibration and error-averaging have been developed to achieve high matching accuracy of components, they are not readily applied to flash-type ADCs.
This thesis proposes a direct, digital code-error, calibration technique to improve the linearity of two-step flash ADCs. When implemented in MOS technologies, this technique eliminates other errors resulting from MOS switch feedthrough, op amp offsets, and interstage gain errors. Nonlinearities of ADCs are statistically simulated considering component mismatch and other nonideal factors. A test chip has been verified by ADICE and ISPLICE3 and implemented using a 2 $\mu$m N-well CMOS technology from Analog Devices, Inc. Experimental results of the prototype show that the proposed calibration technique reduces total harmonic distortion from $-$64 dB to $-$77 dB and improves signal-to-noise ratio from 61 dB to 67 dB after calibration.
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