Nonblocking packet switching with shift-register rings
Murakami, Gary James
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Permalink
https://hdl.handle.net/2142/20438
Description
Title
Nonblocking packet switching with shift-register rings
Author(s)
Murakami, Gary James
Issue Date
1991
Doctoral Committee Chair(s)
Campbell, Roy H.
Department of Study
Computer Science
Discipline
Computer Science
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Computer Science
Language
eng
Abstract
This research investigates packet switching with gigabit-per-second ports for integrated broadband services. The Pulsar switch design is based on a fast word-parallel shift-register ring, and it is a platform for studying the fundamentals of packet switching.
With simple First-Come-First-Served (FCFS) input queues, the phenomenon of Head-Of-Line (HOL) blocking lowers throughput. Simulation and analysis of several design alternatives illuminate the problem. A spectrum of queue configurations is constructed from the preliminary studies. Results confirm that non-blocking throughput can be reached with output queueing or with non-FCFS input queueing. Per-destination subqueues at each input port achieve non-blocking throughput with minimal queue memory bandwidth.
With a trivial queue service discipline, a flood of best-effort data traffic can obstruct bandwidth-sensitive video traffic. The Pulsar bandwidth accounting algorithm adjusts the priority of each stream based on whether it is below or above its allocation. A multiple-token medium-access-control mechanism implements prioritized round-robin service, and it can be extended to order traffic classes sensitive to delay or jitter. These developments form a service discipline for distributed queues that guarantees allocated bandwidth.
The Pulsar switch can be implemented easily with existing technology, and it compares favorably with other high-throughput switch designs. The design can be applied to both network switches and computer backplanes which require low latency and feedback control paths.
The research covers the fundamentals of high-speed packet switching including queue configurations for non-blocking throughput, and queue service discipline and medium-access control for allocated bandwidth. The research breaks new ground by combining non-blocking throughput and allocated bandwidth into a switch design for integrated broadband services.
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