This item is only available for download by members of the University of Illinois community. Students, faculty, and staff at the U of I may log in with your NetID and password to view the item. If you are trying to access an Illinois-restricted dissertation or thesis, you can request a copy through your library's Inter-Library Loan office or purchase a copy directly from ProQuest.
Permalink
https://hdl.handle.net/2142/19326
Description
Title
Fast timing simulation of MOS VLSI circuits
Author(s)
Overhauser, David Vincent
Issue Date
1989
Doctoral Committee Chair(s)
Hajj, Ibrahim N.
Department of Study
Electrical and Computer Engineering
Discipline
Electrical Engineering
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Engineering, Electronics and Electrical
Computer Science
Language
eng
Abstract
The purpose of this research is to develop a cost effective timing simulator for digital metal-oxide semiconductor (MOS) very large scale integrated (VLSI) circuits. Verification of the correct operation of VLSI circuits is a very costly process. Therefore, the development of faster verification tools is very important. Fast timing simulation attempts to extract information comparable to that of circuit simulation while requiring processing time comparable to that of logic simulation. This goal is achieved by the use of a nonlinear macromodeling which applies simple voltage calculations with accurate results. Macromodel current equations have been derived based on the dc characteristic equations of MOS transistors, capacitive loading effects, and model card parameters. The voltage-time equations remain relatively simple, although many transistor parameters are included. The equations are used to relate the time response of dc-connected subcircuits to the physical parameters of the devices and their interconnection and take into account the input slew rate and loading. The equations have been implemented in a simulator which produces accurate results and is up to three orders of magnitude faster than SPICE2. The application of these techniques to automatic mixed-mode simulation and parallel processing has also been investigated.
Use this login method if you
don't
have an
@illinois.edu
email address.
(Oops, I do have one)
IDEALS migrated to a new platform on June 23, 2022. If you created
your account prior to this date, you will have to reset your password
using the forgot-password link below.
