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https://hdl.handle.net/2142/19282
Description
Title
Functional abstraction in switch-level simulation
Author(s)
Blaauw, David Theodore
Issue Date
1992
Doctoral Committee Chair(s)
Abraham, Jacob A.
Department of Study
Computer Science
Discipline
Computer Science
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
Ph.D.
Degree Level
Dissertation
Keyword(s)
Computer Science
Language
eng
Abstract
Switch-level simulation has become an indispensable tool in the verification of large MOS circuits. In this dissertation, a new approach to switch-level simulation is proposed. The presented approach is based on the observation that most switch-level phenomena, such as bidirectional signal flow, charge sharing, and charge storage, occur infrequently in a design. The circuit is, therefore, analyzed with functional abstraction algorithms prior to the simulation. The functional abstraction algorithms analyse the circuit and abstract from it a high-level model of its operation. This abstracted model is then used as the basis for the simulation of the circuit. Since the operation of the overall circuit, rather than the full functionality of each individual circuit component is modeled during the simulation, the performance of the simulation is greatly increased. However, the full switch-level behavior is captured by the functional abstraction algorithms, and the accuracy of the simulation is maintained.
The functional abstraction uses static circuit analysis and is automatic and transparent to the user. The abstraction algorithms presented in this dissertation cover a number of circuit grain sizes or levels. In order of increasing size, the four analysis levels are: individual circuit nodes, individual transistors, single dc-connected components, and multiple dc-connected components. At the highest level, the abstraction algorithm generates high-level software models for arbitrarily large circuit blocks. These software models are linked with the simulator and executed in an event-driven fashion. The proposed algorithms were implemented in a switch-level simulator called SNEL, and tested for commercial circuits. It was shown that a simulation speed increase of more than one order of magnitude was obtained using the proposed simulation approach.
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