ECE385: Transitioning ECE 385 from Intel to Xilinx

Iyer, Anushya

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https://hdl.handle.net/2142/124846 Copy

Description

Title

ECE385: Transitioning ECE 385 from Intel to Xilinx

Author(s)

Iyer, Anushya

Issue Date

2023-05-01

Keyword(s)

Vivado, transition, course materials

Abstract

ECE 385 is attempting to transition to the use of more modern tools such as Vivado in the classroom setting. In order to supplement this change, I will be moving all of the class’s assignments from the current program, Quartus, to Vivado. Additionally, I will be updating the documentation to ensure that all labs remain consistent with their respective lab. To perform this task, I started by transitioning the labs used to familiarize students with SystemVerilog onto this new FPGA. This task allowed me to fully understand the basics of Vivado as well as understand how different FPGAs are inherently built. Following this, I needed to move the more rigorous labs onto the new system- which involved understanding how coding in C inherently worked with hardware and how to calibrate those systems to work together. When I started this project, I assumed that there was some form of similarity between the way that Vivado and Quartus worked. Due to this, I initially faced issues from the inability to compile basic programs to reworking the way that LEDs on this new FPGA are lit. This caused me to realize that I needed to take a step back and rework my understanding of this wildly new program from the ground up. Reading the documentation for Vivado, caused me to realize that the mistakes I made were basic errors relating to the inherent configurations of the program. When understanding how this program worked, I then was able to easily run some of the more basic labs. After this, I was able to easily rework my strategy so that other issues could be circumvented by using documentation to my advantage. This strategy allowed me to fully get all of the course’s assignments working on the FPGA.

Type of Resource

text

Language

eng

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