Highly stable integrated RC-based frequency references

Park, Kyu Sang

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https://hdl.handle.net/2142/120513 Copy

Description

Title

Highly stable integrated RC-based frequency references

Author(s)

Park, Kyu Sang

Issue Date

2023-04-28

Director of Research (if dissertation) or Advisor (if thesis)

Hanumolu, Pavan Kumar

Doctoral Committee Chair(s)

Hanumolu, Pavan Kumar

Committee Member(s)

• Rosenbaum, Elyse
• Shanbhag, Naresh
• Zhou, Jin
• Banerjee, Arijit

Department of Study

Electrical & Computer Eng

Discipline

Electrical & Computer Engr

Degree Granting Institution

University of Illinois at Urbana-Champaign

Degree Name

Ph.D.

Degree Level

Dissertation

Keyword(s)

• delta–sigma modulator
• pulse density modulation
• RC oscillator
• ring VCO
• switched capacitor
• switched resistor
• temperature compensation
• aging compensation
• activation energy
• AC current stress
• duty cycling

Abstract

Monolithic RC-based frequency references have been a viable alternative to traditional crystal or MEMS-based oscillators due to their low power consumption, compact size, and lack of requirement for costly off-chip components. However, their inferior frequency accuracy resulting from non-linear temperature sensitivity and aging has restricted their use to systems that can tolerate a frequency inaccuracy of ∼1%. There have been several attempts to improve accuracy and expand the use of these references to applications requiring medium to high stability clock sources. However, these efforts face challenges such as circuit-level imperfections, uncompensated high-order temperature coefficients (TCs), poor power efficiency, and the need for resistors with opposing TCs that may not be obtainable in all processes. Furthermore, despite some literature demonstrating a satisfactory short-term inaccuracy of less than ±600 ppm, their commercial deployment is restricted by the lack of information about their aging behavior and the inability to assure their performance over their lifetime. First, this thesis presents power-efficient techniques to reduce the non-linear temperature sensitivity of fully-integrated CMOS RC oscillators and proposes methods for performing first- and second-order temperature compensation without the need for resistors with opposite TCs. Using the proposed three-point digital trim, a prototype 100-MHz frequency-locked loop (FLL)-based RC oscillator fabricated in a 65-nm CMOS process achieves an inaccuracy of ±140 ppm over −40 °C to 95 °C, 83-ppm/V voltage sensitivity, 1.3-ppm Allan deviation floor, and 1-μW/MHz power efficiency. When only a single-point trim is performed using multiple linear regression model obtained from strong correlation between three switched resistors, the frequency inaccuracy is ±587 ppm over −40 °C to 95 °C. Second, in order to address the aging issue, this thesis proposes a temperature- and aging-compensated RC oscillator (TACO) in which the long-term drift of the main oscillator is compensated by periodically locking its frequency to that of the less-aged reference oscillator. A prototype 100-MHz FLL-based RC oscillator fabricated in a 65-nm CMOS process achieves an inaccuracy of ±1030 ppm from from −40 °C to 85 °C after 500 hours of accelerated aging at 125 °C, with 5.1-psrms period jitter and a power efficiency of 1.4 μW/MHz.

Graduation Semester

2023-05

Type of Resource

Thesis

Copyright and License Information

Copyright 2023 Kyu Sang Park

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