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https://hdl.handle.net/2142/117690
Description
Title
Compact model of ESD diode for circuit simulation
Author(s)
Huang, Shudong
Issue Date
2022-12-09
Director of Research (if dissertation) or Advisor (if thesis)
Rosenbaum, Elyse
Department of Study
Electrical & Computer Eng
Discipline
Electrical & Computer Engr
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Keyword(s)
ESD
Integrated Circuits
Abstract
This work presents non-quasi-static compact models of P-well and N-well ESD-protection diodes for circuit simulation. The ESD N-well diode model uses a formulation similar to the SPICE Gummel-Poon BJT model to capture the essential BJT effects. The underlying physical basis of the models as well as the parameter extraction methodology are discussed. Diode test structures were fabricated in 65-nm CMOS technology. The measurement results confirm that the models accurately predict the transient behavior of diodes during both turn-on and turn-off.
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