Democratizing error-efficient computing

Venkatagiri, Radha

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https://hdl.handle.net/2142/109436 Copy

Description

Title

Democratizing error-efficient computing

Author(s)

Venkatagiri, Radha

Issue Date

2020-12-03

Director of Research (if dissertation) or Advisor (if thesis)

Adve, Sarita V

Doctoral Committee Chair(s)

Adve, Sarita V

Committee Member(s)

• Marinov, Darko
• Misailovic, Sasa
• Fletcher, Christopher W
• Brooks, David
• Bose, Pradip

Department of Study

Computer Science

Discipline

Computer Science

Degree Granting Institution

University of Illinois at Urbana-Champaign

Degree Name

Ph.D.

Degree Level

Dissertation

Keyword(s)

• Error-Efficient Computing
• Approximate Computing
• Low-Cost Resiliency
• Software Testing
• Application-Level Error Analysis

Abstract

We live in a world where errors in computing are becoming ubiquitous and come from a wide variety of sources -- from unintentional bit flips in devices to deliberate approximations and malicious attacks. Future systems must be built to extract maximum computational efficiency while operating with heterogeneous sources of errors. The paradigm of Error-Efficient Computing offers a promising solution by designing efficient computing systems that conserve resources (e.g., time, energy, cost) by allowing the system to make controlled errors. Despite its promise, the widespread adoption of error-efficiency has been thwarted by (1) a lack of principled and uni ed methodologies to assess and exploit error-efficiency opportunities in a given system and (2) excessive programmer burden. This dissertation addresses these limitations by developing methodologies that enable systematic, principled and scalable application of error-efficiency with minimal programmer input. Starting from first principles, the first contribution of this work is the development of automated application-level error analysis tools and techniques that can automatically determine, with high speed and accuracy, the output that a given program will produce for each of the billions of errors that the program might encounter in its computation and data. Using automated error analysis, a comprehensive view of the application's error characteristics, or in other words its error pro file, is derived without the need for programmer expertise. To demonstrate the versatility of this approach, the next contribution of this work is to show how the automatically generated application error profi les can be used to devise different (hardware- and software-based) error efficiency solutions -- from low-cost resiliency to approximate computing -- that can be customized to the application and/or user requirements and output quality targets. Finally, using the novel insight that analyzing a piece of software for (hardware) errors should be similar to testing it for software bugs, concepts from software testing are systematically adapted to significantly improve the speed and scalability of automated error analyses; while the improvements in speed and scalability make error analysis more practical within a computing stack, the methodology used lays the foundation for a principled integration of (hardware) error analysis into the software development work-flow. Overall, the contributions of this dissertation further the goal of enabling the adoption of error-efficiency as a first-class design principle by developing systematic methodologies that allow a principled, unified, and yet, customizable way of exploiting error-efficiency.

Graduation Semester

2020-12

Type of Resource

Thesis

Permalink

http://hdl.handle.net/2142/109436

Copyright and License Information

Copyright 2020 Radha Venkatagiri

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