Inductive noise characterization and mitigation techniques for modern computer systems
Smith, Andrew Timothy
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https://hdl.handle.net/2142/109316
Description
Title
Inductive noise characterization and mitigation techniques for modern computer systems
Author(s)
Smith, Andrew Timothy
Issue Date
2020-07-29
Director of Research (if dissertation) or Advisor (if thesis)
Kumar, Rakesh
Department of Study
Electrical & Computer Eng
Discipline
Electrical & Computer Engr
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Keyword(s)
Inductive Noise
Processor
Mitigation
Power Distribution Network
PDN
Voltage Noise
Simulation
Abstract
As the processor market continues to diversify, and device form factor continues to change, the challenges of processor power delivery and voltage noise become increasingly difficult to address. This thesis characterizes voltage emergencies and evaluates voltage noise mitigation techniques across a range of processors and power distribution networks. Each processor class has unique design constraints that affect voltage noise to differing degrees. This work considers three processor and PDN combinations representative of the current processor market. We evaluate the voltage noise observed, and for each system we evaluate three predictive architectural techniques to mitigate voltage noise. We describe the challenges inherent to each of these techniques, and the potential improvements to the architectural techniques. We also present Predict-T, a modern simulation framework for evaluating power supply and processor interaction. The framework is useful for evaluating collaborative circuit level and architecture level noise mitigation techniques. Finally, an instruction dependency-based prediction mechanism is proposed and evaluated across the different processors.
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