Director of Research (if dissertation) or Advisor (if thesis)
Rosenbaum, Elyse
Department of Study
Electrical & Computer Eng
Discipline
Electrical & Computer Engr
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Date of Ingest
2020-08-26T21:58:01Z
Keyword(s)
Electrostatic Discharge, Integrated Circuits
Abstract
Part 1 of this thesis presents a method to measure sub-nanosecond reverse recovery in wafer-level test structures. The setup uses a transmission line pulse generator with a time domain through connection to measure the device under test current. The setup is then used to measure reverse recovery in a 65 nm CMOS ESD diode, and it is found that a quasi-static compact model does not accurately describe the observed transient. A non-quasi-static charge control model is used to accurately simulate both the reverse recovery and forward bias behavior.
Part 2 of this thesis reports the design and fabrication of an active feedback based high-voltage tolerant power clamp with optimally biased positive and negative feedback to bypass the trade-off between ESD performance and mis-trigger immunity. The circuit was fabricated in 28 nm CMOS, and characterization results show a 70% improvement in failure current over previous designs while maintaining mis-trigger immunity.
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