Enhanced modeling methodology for system-level electrostatic discharge simulation
Xiong, Jie
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https://hdl.handle.net/2142/104725
Description
Title
Enhanced modeling methodology for system-level electrostatic discharge simulation
Author(s)
Xiong, Jie
Issue Date
2019-04-03
Director of Research (if dissertation) or Advisor (if thesis)
Rosenbaum, Elyse
Department of Study
Electrical & Computer Eng
Discipline
Electrical & Computer Engr
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Keyword(s)
Electrostatic discharge
System-efficient ESD design
IEC 61000-4-2 discharge
TLP characterization
Abstract
To enable accurate system-level electrostatic discharge (ESD) simulation, models for the equipment under test, the ESD source, and the environment are required. This work presents advanced modeling methods for the ESD source, the victim IC, and other on-board components, most notably the transient voltage suppressor. Kernel regression is used to generate an enhanced quasistatic I-V model of an IC pin, which reflects its dependency on the circuit board’s power delivery network. S-parameter measurements enable the development of a model for an IEC 61000-4-2 ESD source that comprehends the coupling among the ground straps and the ground plane. The transient-voltage-suppressor device is modeled using a behavioral snapback model that shows better convergence in circuit simulation than piece-wise models. Furthermore, ESD-induced soft failures are often caused by the noise coupled between the IC package traces. To help identify this type of failure, a hybrid electromagnetic and circuit simulation approach is demonstrated.
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