Metal-assisted chemical etching of semiconductor nanostructures for electronic applications

Kim, Jeong Dong

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https://hdl.handle.net/2142/98179 Copy

Description

Title

Metal-assisted chemical etching of semiconductor nanostructures for electronic applications

Author(s)

Kim, Jeong Dong

Issue Date

2017-06-26

Director of Research (if dissertation) or Advisor (if thesis)

Li, Xiuling

Doctoral Committee Chair(s)

Li, Xiuling

Committee Member(s)

• Coleman, James J.
• Eden, James G.
• Lyding, Joseph W.
• Nam, SungWoo

Department of Study

Electrical & Computer Eng

Discipline

Electrical & Computer Engr

Degree Granting Institution

University of Illinois at Urbana-Champaign

Degree Name

Ph.D.

Degree Level

Dissertation

Keyword(s)

• Metal-assisted chemical etching
• Silicon (Si) via array
• Crystalline silicon (Si)
• Polycrystalline silicon (Si)
• Complementary metal-oxide-semiconductor (CMOS)-compatible catalyst
• Titanium nitride

Abstract

Metal-assisted Chemical Etching (MacEtch) is a robust and versatile top-down etching process which has the capability of overcoming the limits of conventional wet and dry etching. The advantage of producing anisotropic high aspect ratio micro- and nanostructures with the absence of ion induced surface damage has attracted tremendous attention in device applications such as light emitting diodes, solar cells, biosensors, supercapacitors, thermo-electrics, and 2.5 D and 3D transistors. The detailed research on MacEtch has been accomplished by many researchers since its discovery by Li and Bohn in 2000. This includes MacEtch using different types of substrates (Si, GaAs, InP, GaP, GaN), metal catalysts (Au, Ag, Pt), substrate doping concentration, porosity and so on. Although there has been huge progress over the years, there are still obstacles which limit the application of MacEtch in commercial industries. First, there is still no experimental demonstration in the literature describing the simultaneous influence of carrier generation and mass transport in MacEtch. Second, noble metals used as the catalysts in MacEtch are not compatible with complementary metal-oxide-semiconductor (CMOS) technology due to the deep-level traps. In this dissertation, sub-micron scale highly ordered crystalline silicon (c-Si) via array is demonstrated by MacEtch. The systematic study of etch rate as functions of catalyst diameter, pitch, and spacing experimentally demonstrates the simultaneous influence of carrier generation and mass transport in MacEtch. Next, sub-micron scale polycrystalline silicon (Poly-Si) via using a novel method called self-anchored catalyst (SAC) MacEtch is presented. The catalysts delamination and detour resulted by the inconsistent etching originated from polycrystalline grains and grain boundaries are minimized by physically anchoring the catalyst with the nanowires formed through the porous catalyst array. This SAC-MacEtch is also demonstrated in the large scale though c-Si via array and GaAs via array. Next, the first demonstration of CMOS-compatible titanium nitride (TiN) assisted chemical etching is presented. The conventional liquid phase and the vapor phase MacEtch are demonstrated to characterize the inverse MacEtch, and the modified vapor phase MacEtch is introduced to make the transition from inverse to forward MacEtch by enhancing the mass transport of etchant and byproducts. The length of the nanowire array produced by the mesh patterned TiN is characterized as the function of mesh dimension, etching temperature, and TiN thickness to analyze the etching characteristics. Next, GaP MacEtch with the Au catalyst using HF and H2O2 is presented. Inverse and forward Macetch are controlled by enhancing or limiting the MT.

Graduation Semester

2017-08

Type of Resource

text

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http://hdl.handle.net/2142/98179

Copyright and License Information

Copyright 2017 Jeong Dong Kim

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