Transient circuit simulation of MOSFETs using latency insertion method
Hajimiri, Maryam
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https://hdl.handle.net/2142/97663
Description
Title
Transient circuit simulation of MOSFETs using latency insertion method
Author(s)
Hajimiri, Maryam
Issue Date
2017-03-20
Director of Research (if dissertation) or Advisor (if thesis)
Schutt-Ainé, José
Department of Study
Electrical & Computer Eng
Discipline
Electrical & Computer Engr
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Keyword(s)
Latency insertion method (LIM)
Metal-oxide semiconductor field-effect transistors (MOSFET) model
Abstract
With the remarkable success in the electronics industry, the designers working in the engineering community are constantly demanding computer-based analysis tools that provide faster yet more accurate simulation results. The design engineers are required to efficiently address the design issues at early stages by performing extensive circuit simulations, which may be time consuming if the number of possible design approaches is big and the simulation runtime for each is long. Hence the need for computer-aided design tools with higher speed and performance.
This thesis presents an approach to utilize the latency insertion method (LIM) in the transient simulation of the circuits involving metal-oxide semiconductor field-effect transistors (MOSFETs) with the use of advanced transistor models. Simulations via LIM achieve higher computational speed, especially in nonlinear systems. A more accurate simulation of digital and analog circuits can be performed by taking into account the nonlinear charge storage capacitances and other second-order effects in short-channel devices. Hence, the SPICE LEVEL 3 transistor model for MOSFETs is employed in this work. Several computer simulations validate the method and indicate the high-level models provide better accuracy.
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