Synthesis constraint optimization for near-threshold voltage design
Min, David
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https://hdl.handle.net/2142/97551
Description
Title
Synthesis constraint optimization for near-threshold voltage design
Author(s)
Min, David
Issue Date
2017-04-17
Director of Research (if dissertation) or Advisor (if thesis)
Kim, Nam Sung
Department of Study
Electrical & Computer Eng
Discipline
Electrical & Computer Engr
Degree Granting Institution
University of Illinois at Urbana-Champaign
Degree Name
M.S.
Degree Level
Thesis
Keyword(s)
Near-threshold voltage
Low-energy
Embedded systems
Abstract
Near-threshold voltage (NTV) design is a viable solution to many embedded systems which require high energy efficiencies and low performances, but it makes them vulnerable to process variation. Increasing the size of devices and/or decreasing the operating frequencies of the systems can be the solutions, but these methods decrease the energy efficiencies which is cancelling out the benefit from NTV. In this work, we test multiple logic synthesis options on openMSP430 microcontroller with TSMC 65nm technology library and suggest the optimal design points to the future IC designers. We find synthesizing the microcontroller with the minimum design constraint gives us the best performance and energy consumption. We also run Monte Carlo simulation to show the estimated yield rate of the suggested design points.
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