Design of a Bit-Sliced Processor Array with Built-In-Self-Test
Mui, Paul Chunhei
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https://hdl.handle.net/2142/75301
Description
Title
Design of a Bit-Sliced Processor Array with Built-In-Self-Test
Author(s)
Mui, Paul Chunhei
Issue Date
1984-07
Keyword(s)
Built-in test
Self-test
Bit-sliced ALU
VLSI circuits
Publisher
Computer Systems Group, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report Name or Number
Coordinated Science Laboratory Report no. CSG-31
Type of Resource
text
Language
English
Permalink
http://hdl.handle.net/2142/75301
Sponsor(s)/Grant Number(s)
Semiconductor Research Corporation / SRC RSCH 83-01-014
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