Parallel Processing Techniques for the Simulation of MOS VLSI Circuits Using Waveform Relaxation

Smart, David William

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https://hdl.handle.net/2142/88613 Copy

Description

Title

Parallel Processing Techniques for the Simulation of MOS VLSI Circuits Using Waveform Relaxation

Author(s)

Smart, David William

Issue Date

1988-07

Keyword(s)

• Parallel processing
• Circuit simulation
• Waveform relaxation

Publisher

Coordinated Science Laboratory, University of Illinois at Urbana-Champaign

Series/Report Name or Number

Coordinated Science Laboratory Report no. UILU-ENG-88-2237, DAC-12

Type of Resource

text

Language

en

Permalink

http://hdl.handle.net/2142/88613

Sponsor(s)/Grant Number(s)

• Semiconductor Research Corporation / 87-DP-109
• Sandia National Laboratory / 02-8522
• Joint Services Electronics Program / N00014-84-C-0149

Owning Collections