Parallel Algorithms for Test Generation and Fault Simulation

Patil, Srinivas

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https://hdl.handle.net/2142/88642 Copy

Description

Title

Parallel Algorithms for Test Generation and Fault Simulation

Author(s)

Patil, Srinivas

Issue Date

1990-09

Keyword(s)

• CAD
• Digital circuits
• VLSI
• Multiprocessors
• Heuristics
• Generation/fault simulation

Publisher

Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign

Series/Report Name or Number

Coordinated Science Laboratory Report no. UILU-ENG-90-2245, CRHC-90-12

Type of Resource

text

Language

en

Permalink

http://hdl.handle.net/2142/88642

Sponsor(s)/Grant Number(s)

Semiconductor Research Corporation / 89-DP-109

Owning Collections