University of Illinois Urbana-Champaign

Test Generation and Evaluation for Bridging Faults in CMOS VLSI Circuits

Lee, Terry Ping-Chung

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https://hdl.handle.net/2142/88631

Description

Title
Test Generation and Evaluation for Bridging Faults in CMOS VLSI Circuits
Author(s)
Lee, Terry Ping-Chung
Issue Date
1995-09
Keyword(s)
  • Test generation
  • ATPG
  • Current testing
  • IDDQ
  • Bridging faults
  • Shorts
  • Genetic algorithm
  • GA
Publisher
Analog and Digital Circuits, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report Name or Number
Coordinated Science Laboratory Report no. UILU-ENG-95-2234, DAC-52
Type of Resource
text
Language
en
Permalink
http://hdl.handle.net/2142/88631
Sponsor(s)/Grant Number(s)
SRC / 93-DP-109

Owning Collections

Report - Coordinated Science Laboratory PRIMARY