University of Illinois Urbana-Champaign

Piecewise Linear Approach for Timing Simulation of VLSI Circuits on Serial and Parallel Computers

Tejayadi, Ongky

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https://hdl.handle.net/2142/88611

Description

Title
Piecewise Linear Approach for Timing Simulation of VLSI Circuits on Serial and Parallel Computers
Author(s)
Tejayadi, Ongky
Issue Date
1987-12
Keyword(s)
  • Timing simulation
  • Piecewise linear techniques
  • Dynamic partitioning
  • Parallel algorithms
  • VLSI
Publisher
Coordinated Science Laboratory, University of Illinois at Urbana-Champaign
Series/Report Name or Number
Coordinated Science Laboratory Report no. UILU-ENG-87-2279, DAC-8
Type of Resource
text
Language
en
Permalink
http://hdl.handle.net/2142/88611
Sponsor(s)/Grant Number(s)
  • Semiconductor Research Corporation / 86-12-109
  • Joint Services Electronics Program / N00014-84-C-0149

Owning Collections

Report - Coordinated Science Laboratory PRIMARY