Parallel Algorithms for Logic Synthesis

De, Kaushik

Permalink

https://hdl.handle.net/2142/88465 Copy

Description

Title

Parallel Algorithms for Logic Synthesis

Author(s)

De, Kaushik

Issue Date

1993-09

Keyword(s)

• Algorithms
• Parallel architectures
• Portable
• Sequential interfaces

Publisher

Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign

Series/Report Name or Number

Coordinated Science Laboratory Report no. UILU-ENG-93-2235, CRHC-93-20

Type of Resource

text

Language

en

Permalink

http://hdl.handle.net/2142/88465

Sponsor(s)/Grant Number(s)

Joint Services Electronics Program, Office of Naval Research, and Semiconductor Research Corp. / N00014-90-J-1270 and 92-DP-109

Owning Collections