Lower and Upper-Bounds for the General Junction Routing Problem

Maddila, Sanjeev Rao; Zhou, Dian

Permalink

https://hdl.handle.net/2142/74262 Copy

Description

Title

Lower and Upper-Bounds for the General Junction Routing Problem

Author(s)

• Maddila, Sanjeev Rao
• Zhou, Dian

Issue Date

1988-05

Keyword(s)

• VLSI placement and routing
• Junction routing
• Channel routing
• Decomposition
• Multiterminal nets
• Lower bounds
• Upper bounds
• Knock-knee model

Publisher

Applied Computation Theory, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign

Series/Report Name or Number

Coordinated Science Laboratory Report no. UILU-ENG-88-2224, ACT-90

Type of Resource

text

Language

English

Permalink

http://hdl.handle.net/2142/74262

Sponsor(s)/Grant Number(s)

• National Science Foundation / ECS 84-10902
• Semiconductor Research Corporation

Owning Collections