Automatic Generation of Instruction Sequences for Testing Microprocessors

Lee, Jaushin; Patel, Janak H.

Permalink

https://hdl.handle.net/2142/74531 Copy

Description

Title

Automatic Generation of Instruction Sequences for Testing Microprocessors

Author(s)

• Lee, Jaushin
• Patel, Janak H.

Issue Date

1992-06

Keyword(s)

• VLSI
• CAD
• High level test generation
• High-level test generation
• Microprocessors

Publisher

Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign

Series/Report Name or Number

Coordinated Science Laboratory Report no. UILU-ENG-92-2213, CRHC-92-09

Type of Resource

text

Language

English

Permalink

http://hdl.handle.net/2142/74531

Sponsor(s)/Grant Number(s)

Semiconductor Research Corporation / SRC 91-DP-109

Owning Collections