An Elementary Theory of Layout Wirability

Lipski, Witold, Jr.; Preparata, Franco P.

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https://hdl.handle.net/2142/74245 Copy

Description

Title

An Elementary Theory of Layout Wirability

Author(s)

• Lipski, Witold, Jr.
• Preparata, Franco P.

Issue Date

1985-03

Keyword(s)

• VLSI
• Layout
• Conducting layer
• Wiring
• Two-layer wirability
• Knock-knee mode
• Layout grid
• Tessellations of the plane

Publisher

Applied Computation Theory Group, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign

Series/Report Name or Number

Coordinated Science Laboratory Report no. ACT-54

Type of Resource

text

Language

English

Permalink

http://hdl.handle.net/2142/74245

Sponsor(s)/Grant Number(s)

Semiconductor Research Corporation / SRC RSCH 84-06-049

Owning Collections