Three Superblock Scheduling Models for Superscalar and Superpipelined Processors
Chang, Pohua P.; Warter, Nancy J.; Mahlke, Scott A.; Chen, William Y.; Hwu, Wen-Mei W.
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https://hdl.handle.net/2142/74519
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Title Three Superblock Scheduling Models for Superscalar and Superpipelined Processors Author(s) Chang, Pohua P. Warter, Nancy J. Mahlke, Scott A. Chen, William Y. Hwu, Wen-Mei W. Issue Date 1991-12 Keyword(s) Conditional branches Exception handling Speculative execution Static code scheduling Superblock Super-piplining superscalar Super-pipelining superscalar Publisher Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign Series/Report Name or Number Coordinated Science Laboratory Report no. UILU-ENG-91-2250, CRHC-91-29 Type of Resource text Language English Permalink http://hdl.handle.net/2142/74519 Sponsor(s)/Grant Number(s) National Science Foundation / MIP-8809478 NCR AMD 29K Advanced Processor Development Division National Aeronautics and Space Administration / NASA NAG 1-613 Office of Naval Research / N00014-88-K-0656
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